142
9152BINDCO02/10
ATA8743
out
USICR,r17
in
r16,USIDR
ret
23.3.3
SPI Slave Operation Example
The following code demonstrates how to use the USI module as a SPI Slave:
init:
ldi
r16,(1<
out
USICR,r16
...
SlaveSPITransfer:
out
USIDR,r16
ldi
r16,(1<
out
USISR,r16
SlaveSPITransfer_loop:
in
r16, USISR
sbrs
r16, USIOIF
rjmp
SlaveSPITransfer_loop
in
r16,USIDR
ret
The code is size optimized using only eight instructions (+ ret). The code example assumes that
the DO is configured as output and USCK pin is configured as input in the DDR Register. The
value stored in register r16 prior to the function is called is transferred to the master device, and
when the transfer is completed the data received from the Master is stored back into the r16
Register.
Note that the first two instructions is for initialization only and needs only to be executed
once.These instructions sets Three-wire mode and positive edge Shift Register clock. The loop
is repeated until the USI Counter Overflow Flag is set.
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ATAVRRZ200
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